ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 623

• Manufacturer Part Number: ATSAM3U-EK
• Description: KIT EVAL FOR AT91SAM3U CORTEX
• Manufacturer: Atmel
• Type: MCUr

Specifications of ATSAM3U-EK

• Contents: Board
• Processor To Be Evaluated: SAM3U
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3 V
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: SAM3U4E
• Silicon Family Name: SAM3U
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

33.4.1
Table 33-3.
33.5
33.5.1
33.5.2
33.5.3
33.6
33.6.1
6430D–ATARM–25-Mar-11
Pin Name
TWD
TWCK
Product Dependencies
Functional Description
I/O Lines Description
I/O Lines
Power Management
Interrupt
Transfer Format
I/O Lines Description
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with PIO lines. To enable the TWI, the programmer
must perform the following step:
The user must not program TWD and TWCK as open-drain. It is already done by the hardware.
The TWI interface may be clocked through the Power Management Controller (PMC), thus the
programmer must first configure the PMC to enable the TWI clock.
The TWI interface has an interrupt line connected to the Nested Vector Interrupt Controller
(NVIC). In order to handle interrupts, the NVIC must be programmed before configuring the TWI.
Table 33-4.
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte must
be followed by an acknowledgement. The number of bytes per transfer is unlimited (see
33-4).
Each transfer begins with a START condition and terminates with a STOP condition (see
33-3).
• Program the PIO controller to dedicate TWD and TWCK as peripheral lines.
• Enable the peripheral clock.
• A high-to-low transition on the TWD line while TWCK is high defines the START condition.
• A low-to-high transition on the TWD line while TWCK is high defines a STOP condition.
Instance
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
TWI0
TWI1
Peripheral IDs
18
19
ID
Figure 33-2 on page
622). When the bus is free, both lines are
SAM3U Series
Input/Output
Input/Output
Type
Figure
Figure
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