ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 645

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Figure 33-29. Clock Synchronization in Write Mode

6430D–ATARM–25-Mar-11

1. At the end of the read sequence, TXCOMP is set after a STOP or after a REPEATED_START + an address different from

2. SCLWS is automatically set when the clock synchronization mechanism is started and automatically reset when the mecha-

nism is finished.

Clock Synchronization in Write Mode

As soon as a START is detected

The c lock is tied lo w if the shift register and the TWI_RHR is full. If a STOP or

REPEATED_START condition was not detected, it is tied low until TWI_RHR is read.

Figure 33-29 on page 645

CLOCK is tied low by the TWI as long as RHR is full

describes the clock synchronization in Read mode.

DATA0 is not read in the RHR

SCL is stretched on the last bit of DATA1

SAM3U Series