ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 121

KIT EVAL FOR AT91SAM3U CORTEX

ATSAM3U-EK

Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of ATSAM3U-EK

Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
13.12.1
13.12.1.1
13.12.1.2
13.12.1.3
6430D–ATARM–25-Mar-11
ADD, ADC, SUB, SBC, and RSB
Syntax
Operation
Restrictions
Add, Add with carry, Subtract, Subtract with carry, and Reverse Subtract.
where:
op
S
result of the operation, see
cond
Rd
Rn
Operand2
imm12
The ADD instruction adds the value of Operand2 or imm12 to the value in Rn.
The ADC instruction adds the values in Rn and Operand2, together with the carry flag.
The SUB instruction subtracts the value of Operand2 or imm12 from the value in Rn.
The SBC instruction subtracts the value of Operand2 from the value in Rn. If the carry flag is
clear, the result is reduced by one.
The RSB instruction subtracts the value in Rn from the value of Operand2. This is useful
because of the wide range of options for Operand2.
Use ADC and SBC to synthesize multiword arithmetic, see
page
See also
ADDW is equivalent to the ADD syntax that uses the imm12 operand. SUBW is equivalent to the
SUB syntax that uses the imm12 operand.
In these instructions:
• Operand2 must not be SP and must not be PC
op{S}{cond} {Rd,} Rn, Operand2
op{cond} {Rd,} Rn, #imm12
123.
ADD
ADC
SUB
SBC
RSB
“ADR” on page
is one of:
Add.
Add with Carry.
Subtract.
Subtract with Carry.
Reverse Subtract.
is an optional suffix. If S is specified, the condition code flags are updated on the
is an optional condition code, see
is the destination register. If Rd is omitted, the destination register is Rn.
is the register holding the first operand.
is a flexible second operand.
See
is any value in the range 0-4095.
“Flexible second operand” on page 96
104.
“Conditional execution” on page
“Conditional execution” on page
; ADD and SUB only
for details of the options.
100.
“Multiword arithmetic examples” on
SAM3U Series
100.
121

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