ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 382

Manufacturer Part Number

KIT EVAL FOR AT91SAM3U CORTEX

Manufacturer

Processor To Be Evaluated

Data Bus Width

Interface Type

Operating Supply Voltage

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

Board CD Docs

Rohs Compliant

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Manufacturer

Part Number:

Manufacturer:

Figure 25-29. Clock Rate Transition Occurs while the SMC is Performing a Write Operation

internal signal from PMC

SAM3U Series

Switching from (to) Slow Clock Mode to (from) Normal Mode

Slow Clock Mode

This write cycle finishes with the slow clock mode set

of parameters after the clock rate transition

When switching from slow clock mode to normal mode, the current slow clock mode transfer is

completed at high clock rate, with the set of slow clock mode parameters. See

external device may not be fast enough to support such timings.

Figure 25-30

SLOW CLOCK MODE WRITE

NWE_CYCLE = 3

illustrates the recommended procedure to properly switch from one mode to the

SLOW CLOCK MODE WRITE

Slow clock mode transition is detected:

Reload Configuration Wait State

NORMAL MODE WRITE

NWE_CYCLE = 7

6430D–ATARM–25-Mar-11