ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 669

Manufacturer Part Number

KIT EVAL FOR AT91SAM3U CORTEX

Manufacturer

Processor To Be Evaluated

Data Bus Width

Interface Type

Operating Supply Voltage

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

Board CD Docs

Rohs Compliant

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Manufacturer

Part Number:

Manufacturer:

Figure 34-6. Receiver Overrun

Figure 34-7. Parity Error

Figure 34-8. Receiver Framing Error

6430D–ATARM–25-Mar-11

Parity Error

Receiver Framing Error

Each time a character is received, the receiver calculates the parity of the received data bits, in

accordance with the field PAR in UART_MR. It then compares the result with the received parity

bit. If different, the parity error bit PARE in UART_SR is set at the same time the RXRDY is set.

The parity bit is cleared when the control register UART_CR is written with the bit RSTSTA

(Reset Status) at 1. If a new character is received before the reset status command is written,

the PARE bit remains at 1.

When a start bit is detected, it generates a character reception when all the data bits have been

sampled. The stop bit is also sampled and when it is detected at 0, the FRAME (Framing Error)

bit in UART_SR is set at the same time the RXRDY bit is set. The FRAME bit remains high until

the control register UART_CR is written with the bit RSTSTA at 1.

Wrong Parity Bit

Detected at 0

SAM3U Series