PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 141

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

1. Introduction
2. Functional Description
The Reset module initiates life for the PNX15xx/952x Series system since it
generates all reset signals required for a correct initialization of the entire system
(may include board devices).
These resets signals are triggered by hardware (one type) or by software (three
types):
RST_CAUSE MMIO register holds the cause of the previous reset which allows the
software to know what happened before.
The Reset module generates three different reset signals to fully initialize a PNX15xx/
952x Series system:
Remark: The JTAG state machine can also be reset through the JTAG pins.
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Chapter 4: Reset
PNX15xx/952x Series Data Book – Volume 1 of 1
Rev. 4.0 — 03 December 2007
It sends reset signals to all DCS bus modules and the TM3260 CPU.
It sends a reset signal on the SYS_RST_OUT_N pin that can be used by external
board devices. This signal is then de-asserted by software.
Hardware external reset input to the PNX15xx/952x Series through the pins,
POR_IN_N or RESET_IN_N.
Software assert and release of the SYS_RST_OUT_N reset pin through a write
to an MMIO register write.
Software programmable watchdog timer which asserts the same reset signals as
the hardware reset induced by the assertion of RESET_IN_N pin when a time-out
is reached.
Software PNX15xx/952x Series system reset which asserts the same reset
signals as the hardware reset induced by the assertion of RESET_IN_N pin.
jtag_rst_n. This signal is used internally to reset the JTAG state machine. The
signal is only asserted if the POR_IN_N pin is asserted. Therefore the only mean
to reset the JTAG state machine of PNX15xx/952x Series is by asserting the
POR_IN_N
pin.Figure 1
Product data sheet