PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 225

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
t
t
t
Figure 2:
WH
WL
RL
: (REN_lo + 1) * pci_clk periodShown with REN_lo = 1
: (WEN_lo + 1) * pci_clk periodShown with WEN_lo = 0
: (WEN_hi + 1) * pci_clk period Shown with WEN_hi = 0
pci_clk
frame
WEN
REN
CLE
trdy
irdy
CS
IO
Read Status
The ACK may be monitored to determine when the device is ready prior to initiating
the DMA. Once the device is ready, no further monitoring of the ACK takes place. If
the amount of data to be transferred exceeds one segment, the max burst size should
be set to 128 to allow for pause in the transfer that allows the ACK to be monitored
between segments. Note that this approach will not pause at the correct location if the
spare area is being accessed.
Examples of block erase, data read and write and status read are shown in the
following timing diagrams.
command_a
Rev. 4.0 — 03 December 2007
t
WL
t
WH
t
status
RL
PNX15xx/952x Series
Chapter 7: PCI-XIO Module
© NXP B.V. 2007. All rights reserved.
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