PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 550

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
Programmers should refer to the IEC-60958 Digital Audio Interface , “Part 1:General;
Part 2: Professional Applications; Part 3: Consumer Applications” for a precise
description of the required values in each field for different types of consumer
equipment.
The SPDO block hardware only generates B, W and M preambles as well as the P
(Parity) bit. All other bits in the sub-frame are completely determined by software and
copied “as is” from memory to output, subject only to bit-cell coding.
Software must construct valid IEC-60958 blocks by using the right sequence of 32-bit
words as described in
IEC-60958 Bit Cell and Preamble
Each data bit in IEC-60958 is transmitted using bi-phase mark encoding. In bi-phase
mark encoding, each data bit is transmitted as a cell consisting of two consecutive
binary states. The first state of a cell is always inverted from the second state of the
previous cell. The second state of a cell is identical to the first state if the data bit
value is a “0”, and inverted if the data bit value is a “1”.
Preambles are coded as bi-phase mark violations, where the first state of a cell is not
the inverse of the last state of the previous cell.
The duration of each state in a cell is called a UI (Unit Interval), so that each cell is 2
UIs long. In SPDO, the length of a UI is 1 SPDO clock cycle as determined by the
settings of the DDS (see
Figure 2
the transmission format of the three preambles. Note that each preamble always
starts with a rising edge. This is made possible by the presence of the parity bit,
which always guarantees an even number of ‘1’ bits in each subframe.
Figure 2:
illustrates the transmission format of 8 bit data value “10011000”, as well as
Bi-Phase Mark Data Transmission
Rev. 4.0 — 03 December 2007
Bi-Phase Mark
W Preamble
M Preamble
B Preamble
Section IEC-60958 Memory Data Format
NRZ
Section 3.1.1 Sample Rate
“1”
“0”
“0”
“1”
PNX15xx/952x Series
UI
cell
“1”
bi-phase mark violation
bi-phase mark violation
bi-phase mark violation
Programming).
“0”
Chapter 17: SPDIF Output
“0”
“0”
© NXP B.V. 2007. All rights reserved.
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