PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 344

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
Table 9: Register Description
6. References
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
0
Offset 0x06 5284
31:2
1:0
Offset 0x06 5288
31:0
Offset 0x06 528C
31:1
0
Offset 0x06 5290
31:10
9:0
Offset 0x06 5FFC
31:16
15:12
11:8
7:0
Symbol
VALID
Unused
MTL_PORT
MTL_CMD_ADDR
Unused
MTL_CMD_READ
Unused
MTL_CMD_ID
MODULE_ID
MAJOR_REV
MINOR_REV
APERTURE
ERR_MTL_PORT
ERR_MTL_CMD_ADDR
ERR_MTL_CMD_READ
ERR_MTL_CMD_ID
MODULE_ID
[1]
[2]
Access Value
R/W
R
R
R
R
R
R
R
R
R
R
R
Double Data Rate (DDR) SDRAM specification, JEDEC standard JESD79,
June 2000, JEDEC Solid State Technology Association
EIA/JEDEC Standard, Stub Series Terminated Logic for 2.5 Volts (SSTL_2),
EIA/JESD8-9, September 1998, Electronic Industries Association, JEDEC
Solid State Technology Division
0x0
-
-
-
-
-
-
-
0x2031
1
1
0
Rev. 4.0 — 03 December 2007
Description
‘0’: no error
‘1’: error
This is used to acknowledge the interrupt error indication.
These bits should be ignored when read, and written as 0s.
MTL port that caused the error.
MTL command address.
These bits should be ignored when read, and written as 0s.
MTL command read.
These bits should be ignored when read, and written as 0’s.
MTL command identifier:
CPU: 0x000
DE: 0x000
PCI: 0x080
QVCP: 0x001
VIP: 0x002
VLD: 0x082
FGPI: 0x102
MBS (read): 0x004
MBS (write): 0x084
10/100 MAC: 0x005
FGPO: 0x085
SPDIO, AIO, GPIO: 0x006
DVDD: 0x086
DMA Gate: 0x106
DDR memory controller module ID
Major revision number
Minor revision number
Aperture size is 4 KB ((APERTURE+1)* 4 KB).
PNX15xx/952x Series
Chapter 9: DDR Controller
© NXP B.V. 2007. All rights reserved.
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