PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 710

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
5.4.8 Transmit Triggers Interrupts
The transmission can generate several types of errors: LateCollision,
ExcessiveCollision, ExcessiveDefer, Underrun, and NoDescriptor. All have
corresponding bits in the transmission Status. On top of the separate bits in the
Status, bits for LateCollision, ExcessiveCollision, ExcessiveDefer are ORed together
into the Error bit of the Status. Errors are also propagated to the IntStatus register:
the Tx(Rt)Error bit in the IntStatus register is set in case of a LateCollision,
ExcessiveCollision, ExcessiveDefer, or NoDescriptor error, while underrun errors are
reported in the Tx(Rt)Underrun bit of the IntStatus register.
Underrun errors can have three causes:
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The first and second situations are non fatal and the device driver has to resend the
frame or have upper SW layers resend the frame. In the third case the HW is in an
undefined state and needs to be soft reset by setting the Command.TxReset bit.
After reporting a LateCollision, ExcessiveCollision, ExcessiveDefer or Underrun error
the transmission of the erroneous frame will be aborted, remaining transmission data
and frame fragments will be dis-carded and transmission will continue with the next
frame in the descriptor array.
Device drivers should catch the transmission errors and take action.
The Transmit Datapath can generate four different interrupt types:
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the next fragment in a multi fragment transmission is not available. This is a
non fatal error. A NoDescriptor status will be returned on the previous fragment
and the IntStatus.Tx(Rt)Error bit will be set.
the transmission fragment data is not available while the LAN100 has already
started sending the frame. This is a non fatal error. An Underrun status will be
returned on trans-fer and IntStatus.Tx(Rt)Error bit will be set.
the flow of transmission statuses stalls and a new status has to be written while
a previous status still waits to be transferred. This is a fatal error which can only
be resolved by soft resetting the HW.
If the Interrupt bit in the descriptor Control field is set, the Tx DMA will set the
Tx(Rt)DoneInt bit in the IntStatus register after sending the fragment and com-
mitting the associated transmission status to memory. Even if a descriptor
(fragment) is not the last in a multi-fragment packet, the Interrupt bit in the
descriptor can be used to generate an interrupt.
If the descriptor FIFO is empty while the Ethernet hardware is enabled, the
hardware will set the Tx(Rt)FinishedInt bit of the IntStatus register.
In case memory does not provide transmission data at a sufficiently high band-
width, the transmission may underrun, in which case the Tx(Rt)Underrun bit
will be set in the IntStatus register. Another cause for underrun is if the trans-
mission status interface stalls. This is a fatal error which requires a softreset of
the transmission queue.
In the event of a transmission error (such as LateCollision, ExcessiveCollision
or ExcessiveDefer) or if the device driver provided initial fragments but did not
provide the rest of the fragments (NoDescriptor) or in case of a non fatal over-
run the hardware will set the Tx(Rt)ErrorInt bit of the IntStatus register.
Rev. 4.0 — 03 December 2007
Chapter 23: LAN100 — Ethernet Media Access Controller
PNX15xx/952x Series
© NXP B.V. 2007. All rights reserved.
23-710