PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 472

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
3. Operation
PNX15XX_PNX952X_SER_N_4
Product data sheet
Figure 4:
Double Buffer Major States
2.13 Single Buffer Operation
3.1.1 Setup
3.1 Both Operating Modes
start
OUTPUT_ENABLE_2. Buffer 1 will become the active buffer first. Starting with the
next record or message start event samples will be output from buffer 1 until either
output is disabled or buffer 1 is terminated by a buffer start event.
Double buffer operation may be terminated by disabling the next buffer to which the
FGPO will switch to. This is done by clearing the associated
FGPO_CTL.OUTPUT_ENABLE_n bit.
Single buffer operation may be enabled by only setting the
FGPO_CTL.OUTPUT_ENABLE_1 bit. When buffer 1 is done, sample output will stop
until the BUF1DONE_ACK is received.
Initialize all registers except the FGPO_CTL register, first, then load the FGPO_CTL
register with the OUTPUT_ENABLE_1 and OUTPUT_ENABLE_2 bits set.
ack buffer 2
ack buffer 1
Rev. 4.0 — 03 December 2007
active = buf1
active = buf2
active = buf2
active = buf1
buf1done
buf2done
buffer 1 done
buffer 2 done
buffer 2 done
Chapter 13: FGPO: Fast General Purpose Output
!ack1 & ack2
buffer 1 done
ack1 &!ack2
ack1 & ack2
UNDERRUN
buf1done
buf2done
PNX15xx/952x Series
© NXP B.V. 2007. All rights reserved.
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