PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 750

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
3. Operation
PNX15XX_PNX952X_SER_N_4
Product data sheet
2.1.3 PNX15xx/952x Series JTAG Instruction Set
3.1 Register Programming Guidelines
(loaded in parallel into the shift register stage), n bits are shifted in and
simultaneously, n bits are shifted out. Finally the register is “updated” with the new n
bits shifted in.
Note that when a register is scanned, its old value is shifted out of TDO and the new
value shifted in via TDI is written to the register at the Update state. Hence, scan in/
out involve the same steps. This also means that reading a register via JTAG destroys
its contents unless otherwise stated.
Some registers are specified as read-only via JTAG so that when the controller
transitions to the Update state for the read-only register, the update has no effect.
Some times, read/write registers are needed (e.g., control registers used for
handshake) which must be read non-destructively. In such cases, the value shifted in
determines whether the old value is “remembered” or something else happens.
PNX15xx/952x Series uses a 5-bit JTAG instruction register. The unspecified
opcodes are private and their effects are undefined.
instructions related to TM_DBG module.
Table 1: JTAG TM3260 Instruction Encoding
The standard JTAG instructions such as EXTEST, SAMPLE/PRELOAD, BYPASS and
IDCODE are implemented and listed in
Table 2: JTAG Instruction Encoding
Because the JTAG data registers live in MMIO space and are accessible by both the
TM3260 CPU and the JTAG controller at the same time, race conditions must not
exist either in hardware or in software. The communication protocol uses a
handshake mechanism to avoid software race conditions.
Encodin
g
10001
10010
10011
10100
10101
10110
Encoding
00000
00001
00010
11111
TM_DBG_SEL_DATA_IN
TM_DBG_SEL_DATA_OUT
TM_DBG_SEL_IFULL_IN
TM_DBG_SEL_OFULL_OUT
TM_DBG_SEL_TM_DBG_CTL1
TM_DBG_SEL_TM_DBG_CTL2
Instruction name
EXTEST
SAMPLE
ICODE
BYPASS
Instruction Name
Rev. 4.0 — 03 December 2007
Table
Action
Select TM_DBG_DATA_IN register
Select TM_DBG_DATA_OUT register
Select TM_DBG_IFULL_IN register
Select TM_DBG_OFULL_OUT register
Select TM_DBG_CTRL register 1
Select TM_DBG_CTRL register 2
Action
Select boundary scan register
Select boundary scan register
Select Identification register
Select bypass register
2.
PNX15xx/952x Series
Table 1
Chapter 24: TM3260 Debug
lists the JTAG
© NXP B.V. 2007. All rights reserved.
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