PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 230

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
t
t
Figure 9:
WH
WL
: (WN_low + 1) * pci_clk periodShown with WN_low = 1
: (WN_high + 1) * pci_clk period Shown with WN_high = 1
pci_clk
ADDR
DATA
frame
OEN
SEL
trdy
WN
irdy
NOR Flash Write
3.1.3 NOR Flash Interface
The NOR flash interface supports 8-bit or 16-bit devices. The following timing
diagrams illustrate write and read timings for a typical NOR device. The busy signal is
not shown; it should be inactive during these cycles. Typically, the busy signal will be
monitored before starting a transaction to the NOR flash. The t
and t
the flash vendor’s specification. Refer to the descriptions for the XIO Select Profile
registers. The resolution is a multiple of the PCI clock period. The t
“wait for data”) is also programmed in the profile bits[13:9].
WL
(write time low) timing should be programmed to match the device based on
t
WH
address
data2
Rev. 4.0 — 03 December 2007
t
WL
PNX15xx/952x Series
address + 1
data 2
Chapter 7: PCI-XIO Module
WH
(write time high)
© NXP B.V. 2007. All rights reserved.
R
(read time, or
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