PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 560

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
Figure 4:
16 bit format,
16-bit samples
stereo
32 bit format,
18-24bit samples
stereo
32 bit raw mode
format
SPDIF Input Sample Order View of Memory
2.3.3 SPDIF Input Endian Mode
SD.left
adr
SubFrame.left
n
The SPDIF Input module can store data in memory using either big-endian or little-
endian formatting.
SD.left
Figure 3:
adr
adr
•
B preamble replaced with ‘0000’
M preamble replaced with ‘0001’
W preamble replaced with ‘0010’
Output raw mode subframe
SPDI_SMPMASK.SMASK. The result of the mask operation is zero extended, at
the least significant end, to the full 32-bits before being placed in memory. The
resultant 32 bit words are of the form: 0x nnnnmm 00 where the n ’s are the 16
msbits of the sample, the m’s are the masked 8 lsbits subject to SMASK, see
Section
Audio Out memory formats.
Raw capture mode: Input subframes are captured and all ‘bi-phase’ encoding
(bits [4:31]) is replaced with a binary representation. The preamble portion (bits
[0:3]) of the subframe is replaced with a code indicating what preamble was
present, see
32-bit word is then placed in memory. This mode can be used for “pass-through”
of audio to an external SPDIF OUT block. The external SPDIF OUT block must
be configured appropriately.
n
SD.right
n
adr+2
Input IEC subframe
n+
3.2.9. This mode produces audio that is compatible with the PNX2700
SPDIF Input: Raw Mode Format
SD.left
Rev. 4.0 — 03 December 2007
adr+4
Figure
SubFrame.right
n+1
SD.right
adr+4
adr+4
3. All parts of the subframe are assembled in order and this
SD.right
B, W or M
pre-amble
n
‘bi-phase’
violations
0
0
adr+6
n
Code
n+1
4
4
Aux.
Aux.
SD.left
adr+8
SubFrame.left
L
S
B
L
S
B
n+2
8
8
SD.left
adr+8
adr+8
n+1
SD.right
adr+10
12
12
n+1
PNX15xx/952x Series
n+2
‘bi-phase’ encoded
binary
16
16
Sample data
Sample data
SD.left
adr+12
Chapter 18: SPDIF Input
SubFrame.right
n+3
SD.right
20
20
adr+12
adr+12
SD.right
© NXP B.V. 2007. All rights reserved.
n+1
adr+14
n+1
24
24
n+3
M
M
S
B
S
B
V U C P
V U C P
28
28
18-560
31
31