PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 822

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
Table 2:
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
0
Offset 0x10 3FDC
31:2
1
0
Offset 0x10 3FE0
31:2
1
0
Offset 0x10 3FE4
31:2
1
0
Offset 0x10 3FE8
31:2
1
0
Symbol
INT_CLR_ENABLE_
ERROR
Reserved
INT_SET_ENABLE_
TOUT
INT_SET_ENABLE_
ERROR
Reserved
INT_STATUS_TOUT
INT_STATUS_ERROR
Reserved
INT_ENABLE_TOUT
INT_ENABLE_ERROR
Reserved
INT_CLEAR_TOUT
INT_CLEAR_ERROR
DCS Controller_TriMedia
BC_INT_SET_ENABLE
BC_INT_STATUS
BC_INT_EN
BC_INT_CLR
Acces
s
W
W
W
R
R
R/W
R/W
W
W
Configuration Registers (Rev 0.32)
Value
0
-
0
0
-
0
0
-
0
0
-
0
0
Rev. 4.0 — 03 December 2007
Description
Error interrupt enable clear register. This is written by software to
clear the interrupt enable (bit 0 of BC_INT_EN).
1 = Error interrupt enable is cleared
0 = Error interrupt enable is unchanged.
Ignore upon read. Write as zeroes.
Timeout interrupt enable set register. This is written by software to
set the interrupt enable (bit 1 of BC_INT_EN).
1 = Timeout interrupt enable is set
0 = Timeout interrupt enable is unchanged.
Error interrupt enable set register. This is written by software to set
the interrupt enable (bit 0 of BC_INT_EN).
1 = Error interrupt enable is set
0 = Error interrupt enable is unchanged.
Ignore upon read. Write as zeroes.
Timeout interrupt status. Reports any pending timeout interrupts:
1 = Timeout interrupt pending: MMIO bus controller has generated a
timeout because a target has violated the programmable limit for
timeout (see BC_TOUT).
0 = Timeout interrupt is not pending.
Error interrupt status. Reports any pending error interrupts:
1 = Error interrupt pending, meaning bus controller has detected an
error acknowledge from a target.
0 = Error interrupt is not pending.
Ignore upon read. Write as zeroes.
Timeout interrupt enable register
1 = Timeout interrupt is enabled
0 = Timeout interrupt is disabled.
Timeout interrupt enable register
1 = Error interrupt is enabled
0 = Error interrupt is disabled.
Ignore upon read. Write as zeroes.
Timeout interrupt clear register. This is written by software to clear
the interrupt.
1 = Timeout interrupt is cleared
0 = Timeout interrupt is unchanged.
Error interrupt clear register. This is written by software to clear the
interrupt.
1 = Error interrupt is cleared
0 = Error interrupt is unchanged.
…Continued
PNX15xx/952x Series
Chapter 30: DCS Network
© NXP B.V. 2007. All rights reserved.
30-822