PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 509
PNX1500E
Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500E.pdf
(828 pages)
Specifications of PNX1500E
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PNX15XX_PNX952X_SER_N_4
Product data sheet
Figure 1:
Audio Out Block Diagram
OSCLK
SCK
WS
SD[0]
SD[2]
SD[3]
SD[1]
2.1 External Interface
Parallel To Serial Converter
Clock Divider/Generator
second buffer in memory as a request for a new first sample buffer in memory is
issued to the system controller. This action is repeated as the buffers in memory are
sent out.
The samples are given to the data serializer (parallel-to-serial converter), which
sends them out in a MSB first or LSB first serial frame format that can also contain
one or two codec control words of up to 16 bits. The output frame structure is
programmable.
The Audio Out module has seven signals connected to the external world:
•
•
•
•
Serial
Clock
AO_OSCLK referenced as OSCLK in this chapter.
AO_SCK referenced as SCK in this chapter.
AO_WS referenced as WS in this chapter.
AO_SD[3:0] referenced as SD[3:0] in this chapter.
Shift Register
Shift Register
Shift Register
Shift Register
SCK Divider
WS Divider
Rev. 4.0 — 03 December 2007
Framing/Sample Options
Divider Value
Divider Value
Parallel
Data
DTL DMA Interface Logic
MMIO Registers & Logic
PNX15xx/952x Series
Chapter 15: Audio Output
© NXP B.V. 2007. All rights reserved.
15-509
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