PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 447
PNX1500E
Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500E.pdf
(828 pages)
Specifications of PNX1500E
Lead Free Status / Rohs Status
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PNX1500E
Manufacturer:
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NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
Table 9: VIP MMIO Register Summary
Offset
0x10 6104
0x10 6140
0x10 6144
0x10 6160
0x10 6164
0x10 6180
0x10 6184
0x10 6200
0x10 6204
0x10 6208
0x10 620C
0x10 6220
0x10 6224
0x10 6228
0x10 622C
0x10 6230
0x10 6284
0x10 6300
0x10 6304
0x10 6340
0x10 6344
0x10 6348
0x10 634C
0x10 6350
0x10 6354
0x10 6358
0x10 635C
0x10 6380
0x10 6390
0x10 6394
0x10 6800—
69FC
0x10 6FE0
0x10 6FE4
0x10 6FE8
0x10 6FEC
0x10 6FFC
Name
VIN_TESTPGEN
WIN_XYSTART
WIN_XYEND
PRE_DIT_CTRL
POST_DIT_CTRL
AUX_XYSTART
AUX_XYEND
HSP_ZOOM_0
HSP_PHASE
HSP_DZOOM_0
HSP_DDZOOM
CSM_COEFF0
CSM_COEFF1
CSM_COEFF2
CSM_OFFS1
CSM_OFFS2
CSM_CKEY
PSU_FORMAT
PSU_WINDOW
PSU_BASE1
PSU_PITCH1
PSU_BASE2
PSU_PITCH2
PSU_BASE3
PSU_BASE4
PSU_BASE5
PSU_BASE6
AUX_FORMAT
AUX_BASE
AUX_PITCH
COEFF_TABLE
INT_STATUS
INT_ENABLE
INT_CLEAR
INT_SET
MODULE_ID
Rev. 4.0 — 03 December 2007
Description
Video test pattern generator
Video horizontal and vertical acquisition window start
Video horizontal and vertical acquisition window end
Pre-Dither control
Post_Dither control
Auxiliary horizontal and vertical acquisition window start
Auxiliary horizontal and vertical acquisition window stop
Initial zoom for 1st pixel in line (unsigned)
Horizontal phase control
Initial zoom delta for 1 pixel in line (signed)
Zoom delta change (signed)
Color space matrix coefficients C
Color space matrix coefficients C
Color space matrix coefficients C
Color space matrix offset coefficients D
Color space matrix rounding coefficients E
Color key components
Output format and mode
Target window size
Target base address DMA #1
Target line pitch component 1
Target base address DMA #2
Target line pitch component 2 and 3
Target base address DMA #3
Target base address DMA #4
Target base address DMA #5
Target base address DMA #6
auxiliary capture output format and mode
Auxiliary capture base address
Auxiliary capture line pitch
Coefficient table for horizontal filter (0-5)
Interrupt status register
Interrupt enable register
Interrupt clear register
Interrupt set register
Module Identification and revision information
…Continued
Chapter 12: Video Input Processor
PNX15xx/952x Series
00
10
20
- C
- C
- C
© NXP B.V. 2007. All rights reserved.
02
12
22
0
-D
0
2
-E
2
12-447
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