PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 607
PNX1500E
Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500E.pdf
(828 pages)
Specifications of PNX1500E
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Table 8: Memory Based Scaler (MBS) Registers
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bit
31:15
14: 3
2:0
Offset 0x10 C348
31:28
27: 3
2:0
Offset 0x10 C34C
31:15
14: 3
2:0
Offset 0x10 C350
31:28
27: 3
2:0
Offset 0x10 C354
31:28
27: 3
2: 0
Offset 0x10 C358
31:28
27: 3
2: 0
Offset 0x10 C35C
31:28
27: 3
2: 0
Miscellaneous Registers
Offset 0x10 C400—C7FC Color Look Up Table
31:24
Symbol
Unused
PSU_PITCH1
Unused
Unused
PSU_BASE2
PSU_OFFSET2
Unused
PSU_PITCH2
Unused
Unused
PSU_BASE3
PSU_OFFSET3
Unused
PSU_BASE4
Unused
Unused
PSU_BASE5
Unused
Unused
PSU_BASE6
Unused
LUT_ALPHA[x]
Target Base Address #2
Target Line Pitch #2
Target Base Address #3
Target Base Address #4
Target Base Address #5
Target Base Address #6
Acces
s
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
-
-
-
-
-
-
-
-
-
-
-
-
-
Value
Rev. 4.0 — 03 December 2007
…Continued
Description
Line pitch DMA #1, signed value (two’s complement)
Used for all packed formats and for plane 1.
Base address DMA #2
Used depending on PSU_BAMODE setting.
Base address byte offset DMA #2
Bits define pixel offset within multi pixel 64-bit words (e.g., a 16-bit
pixel can be placed on any 16-bit boundary).
Line pitch DMA #2, signed value (two’s complement)
Used for planes 2 and 3.
Base address DMA #3
Used depending on PSU_BAMODE setting.
Base address byte offset DMA #3
Bits define pixel offset within multi pixel 64-bit words
(e.g., a 16-bit pixel can be placed on any 16-bit boundary).
Base address DMA #4
Used depending on PSU_BAMODE setting.
Base address DMA #5
Used depending on PSU_BAMODE setting.
Base address DMA #6
Used depending on PSU_BAMODE setting
Alpha
Chapter 19: Memory Based Scaler
PNX15xx/952x Series
© NXP B.V. 2007. All rights reserved.
19-607
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