PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 208

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
Table 2: The Boot Commands
3. PNX15xx/952x Series Boot Scripts Content
PNX15XX_PNX952X_SER_N_4
Product data sheet
Command
write(address,value)
writelist(a,lenght,valarray)
delay(ncycles)
Terminate Boot
3.1 The Common Behavior
Encoding (32 bits each)
Address:
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaa00
Value:
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
Address:
aaaaaaaaaaaaaaaaaaaaaaaaaaaaaa01
length<n>:
nnnnnnnnnnnnnnnnnnnnnnnnnnnnn
value<1>:
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
value<2>:
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
.
.
value<n>:
vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv
nnnnnnnnnnnnnnnnnnnnnnnnnnnn0010
nnnnnnnnnnnnnnnnnnnnnnnnnnnn0110
xxxxxxxxxxxxxxxxxxxxxxxxxxxx1x1x
The following
Unlike PNX1300 Series systems [1], PNX15xx/952x Series uses internal boot scripts
to provide some cost savings at board level by allowing the building of products
without the need of an external EEPROM. The following sections describes the
content of these scripts. If the content of these internal boot scripts is not suitable for
the PNX15xx/952x Series based product, then an EEPROM should be used to
override the internal boot scripts, see
The three scripts have a common section which is the initial configuration sequence
of the PNX15xx/952x Series system. The differences between the boot scripts is
detailed in the next sections. The common behavior is described bellow in the order
in which it happens:
1. Enable the clocks for the TM3260, 100 MHz, and the MMI, 125 MHz, modules.
2. Enable the clocks for the MMIO bus (a.k.a. the DCS Bus), 102 MHz, and the
PCI_SYS_CLK, 33.23 MHz, clocks.
Table 2
Rev. 4.0 — 03 December 2007
documents the coding of the four commands.
Description
Write a single 32-bit value, ‘V’ at address ‘A’ (32-bit
word aligned) MMIO bus or memory address.
‘A’ is the 30-bit value composed by the <a...a> bits
concatenated with two 0s (makes it a 32-bit word
address).
‘V’ is the 32-bit value composed by the <v...v> bits.
Write an arbitrary length list of 32-bit values,
value<1>,..., value<n>, starting at address ‘A’ (32-
bit aligned) MMIO bus or memory address.
value<1> is written at address ‘A’ + 0, value<n> is
written at the 32-bit word address ‘A+n-1’.
‘A’ is the 30-bit value composed by the <a...a> bits
concatenated with two 0s (makes it a 32-bit word
address).
Delay by N 27 MHz cycle periods.
Where N is the 28-bit value composed by the
<n...n> bits.
End boot process. The Boot module releases I2C
bus and becomes non-active until a hardware reset
or software reset occurs.
Reserved for future use.
Section
4..
PNX15xx/952x Series
Chapter 6: Boot Module
© NXP B.V. 2007. All rights reserved.
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