PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 436

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
2.5.3 Internal Timing
2.5.4 Field Identifier Generation
Window start is defined relative to either the rising or falling edges of the VREF and
HREF inputs (or similar D1 events), as shown in
The first qualified data aligned with the REHS reference edge is interpreted as a
U sample. If the UYVY data stream is out of sync, it can be realigned with the vsra
bits in register 00100.
For an example showing how to setup the windower and scaler to capture the entire
test pattern, refer to
The Field Identifier in the D1 mode is extracted from the F bit in every valid video
header, whereas in the VMI mode, the same is derived from the value of the HREF
signal during the negative edge of the VREF signal. The Field Identifier timing is
illustrated in
Note that instead of using the Field Identifier derived from the video stream, it can
also be forced to zero or forced to toggle after each new incoming field; the forced
Figure 8:
Figure 9:
H Bit
V Bit
VIP Pixel
& Line
Source and Target Window Parameters
Acquisition Window Counter Reference
Figure
Rev. 4.0 — 03 December 2007
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shows various Field Identified generation modes.
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Chapter 12: Video Input Processor
PNX15xx/952x Series
Figure
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© NXP B.V. 2007. All rights reserved.
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