PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 541

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
4. Register Descriptions
Table 10: Register Summary
Table 11: Audio (I
PNX15XX_PNX952X_SER_N_4
Product data sheet
Offset
Bit
Note: The clock frequency emitted by the AI_OSCLK output is set in registers that control the Clock block in the chip.
Offset 0x11 1000
31:5
4
3
2
0x11 1000
0x11 1004
0x11 1008
0x11 100C
0x11 1010
0x11 1014
0x11 1018
0x11 101C
0x11 1020—1FF0
0x11 1FF4
0x11 1FFC
Symbol
Unused
BUF1_ACTIVE
OVERRUN
HBE
2
S) Input Ports Registers
3.13 Raw Mode
4.1 Register Table
Name
AI_STATUS
AI_CTL
AI_SERIAL
AI_FRAMING
Reserved
AI_BASE1
AI_BASE2
AI_SIZE
Reserved
AI_PWR_DWN
AI_MODULE_ID
AI_STATUS
Apart from the usual I
the raw mode. At every sample clock (SCK) the data bit(s) from each active channel
is capture along with the WS. This information is then formed as a byte. After four
such bytes are formed, the resulting 32-bit data is transferred to memory. Hence
every sample clock results in a byte of data for software to tear apart and manipulate.
The following table shows how the data bits, and the WS are sampled with respect to
the different channels and formed in to a byte that gets transferred to memory.
Table 9: Raw Mode Format of Input Data and Word Select
The register descriptions for the Audio In block are given below. The base address for
the Audio In registers begins at offset 0x11 1000.
Bit 7
0
Acces
s
R
R
R
Bit 6
0
-
1
0
0
Value
Rev. 4.0 — 03 December 2007
Bit 5
0
2
S mode and the early mode, capture can also be enabled in
Description
Provides status of Audio In components/situations.
Control register to configure Audio In options
Control register to configure Audio In serial timing and data options
Control register to configure data framing format
Base address of buffer 1
Base address of buffer 2
The DMA Buffer size in samples
Powerdown function. Implementation details not decided yet.
Module ID number, including major and minor revision levels
Description
1 = Buffer will be used for the next incoming sample.
0 = Buffer 2 will receive the next sample.
An OVERRUN error has occurred i.e., software failed to provide an
empty buffer in time and 1 or more samples have been lost.
Bandwidth Error
Bit 4
SD[3]
Bit 3
SD[2]
PNX15xx/952x Series
Bit2
SD[1]
Chapter 16: Audio Input
Bit 1
SD[0]
© NXP B.V. 2007. All rights reserved.
Bit 0
WS
16-541