PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 530
PNX1500E
Manufacturer Part Number
PNX1500E
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1500E.pdf
(828 pages)
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NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
2.2 General Operations
Software initiates capture by providing two equal size empty buffers and putting their
base address and size in the BASE1, BASE2 and SIZE registers. Once two valid
(local memory) buffers are assigned, capture can be enabled by writing a ‘1’ to
CAP_ENABLE. The Audio In unit hardware will proceed to fill buffer 1 with input
samples. Once buffer 1 fills up, BUF1_FULL is asserted, and capture continues
without interruption in buffer 2. If BUF1_INTEN is enabled, a level triggered interrupt
request is generated to the chip level interrupt controller.
Note that the buffers must be 64-byte aligned and must be a multiple of 64 samples in
size (the six LSBits of AI_BASE1, AI_BASE2 and AI_SIZE are always zero).
Software is required to assign a new, empty buffer to BASE1 and perform an ACK1,
before buffer 2 fills up. Capture continues in buffer 2, until it fills up. At that time,
BUF2_FULL is asserted and capture continues in the new buffer 1, etc.
Upon receipt of an ACK, the Audio In hardware removes the related interrupt request
line assertion at the next main clock edge.
In normal operation, the chip level system controller and Audio In hardware
continuously exchange buffers without ever losing a sample. If the system controller
fails to provide a new buffer in time, the OVERRUN error flag is raised. This flag is not
affected by ACK1 or ACK2; it can only be cleared by an explicit write of logic ‘1’ to
ACK_OVR.
Remark: Reserved bits in MMIO registers should be ignored when read and written
as zeros. See
•
Raw sample mode where the serial data for each active serial channel is
sampled at each sampling clock edge along with the AI_WS and transferred to
memory as a byte.
Section 4. on page
Rev. 4.0 — 03 December 2007
16-541.
PNX15xx/952x Series
Chapter 16: Audio Input
© NXP B.V. 2007. All rights reserved.
16-530
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