HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 167

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

(2) 16-Bit Access Space: Figure 6.4 illustrates data alignment control for the 16-bit access space.
With the 16-bit access space, the upper data bus (D15 to D8/AD15 to AD8) and lower data bus
(D7 to D0/AD7 to AD0) are used for accesses. The amount of data that can be accessed at one
time is one byte or one word, and a longword access is executed as two word accesses.
In byte access, whether the upper or lower data bus is used is determined by whether the address is
even or odd. The upper data bus is used for even addresses, and the lower data bus for odd
addresses.
Figure 6.4 Access Sizes and Data Alignment Control (16-bit Access Space)
Byte size
Byte size
Word size
Longword
size
· Even address
· Odd address
1st bus cycle
2nd bus cycle
15
15
15
31
D15
Upper data bus
D8 D7
Rev. 3.00, 03/04, page 125 of 830
24
8
8
8
23
7
7
7
Lower data bus
D0
16
0
0
0