HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 554

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HD64F2168VTE33

Manufacturer Part Number
HD64F2168VTE33
Description
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD64F2168VTE33

Cpu Family
H8S
Device Core Size
16/32Bit
Frequency (max)
33MHz
Interface Type
I2C/IrDA/SCI
Program Memory Type
Flash
Program Memory Size
256KB
Total Internal Ram Size
40KB
# I/os (max)
106
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 75C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / Rohs Status
Not Compliant

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16.3.1
HICR0 and HICR1 contain control bits that enable or disable LPC interface functions, control bits
that determine pin output and the internal state of the LPC interface, and status flags that monitor
the internal state of the LPC interface.
HICR0 and HICR1 are initialized to H'00 by a reset or in hardware standby mode.
• HICR0
Rev. 3.00, 03/04, page 512 of 830
Bit
7
6
5
Bit Name Initial Value Slave Host Description
LPC3E
LPC2E
LPC1E
Host Interface Control Registers 0 and 1 (HICR0, HICR1)
0
0
0
R/W
R/W
R/W
R/W
LPC Enable 3 to 1
Enables or disables the LPC interface function.
When the host interface is enabled (at least one of
the three bits is set to 1), processing for data transfer
between the slave processor and the host processor
is performed using pins LAD3 to LAD0, LFRAME,
LRESET, LCLK, SERIRQ, CLKRUN, and LPCPD.
0: LPC channel 3 operation is disabled
1: LPC channel 3 operation is enabled
0: LPC channel 2 operation is disabled
1: LPC channel 2 operation is enabled
0: LPC channel 1 operation is disabled
1: LPC channel 1 operation is enabled
No address (LADR3) matches for IDR3, ODR3,
STR3, TWR0 to TWR15, SMIC, KCS, or BT
No address (LADR2) matches for IDR2, ODR2, or
STR2
No address (LADR1) matches for IDR1, ODR1, or
STR1
LPC3E
LPC2E
LPC1E

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