HD64F2168VTE33 Renesas Electronics America, HD64F2168VTE33 Datasheet - Page 709

• Manufacturer Part Number: HD64F2168VTE33
• Manufacturer: Renesas Electronics America

Specifications of HD64F2168VTE33

• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Program Memory Type: Flash
• Program Memory Size: 256KB
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Lead Free Status / Rohs Status: Not Compliant

Error protection is cancelled only by a reset or by hardware-standby mode. Note that the reset
should be released after the reset period of 100 µs which is longer than normal. Since high
voltages are applied during programming/erasing of the flash memory, some voltage may remain
after the error-protection state has been entered. For this reason, it is necessary to reduce the risk
of damage to the flash memory by extending the reset period so that the charge is released.
The state-transition diagram in figure 20.16 shows transitions to and from the error-protection
state.
Error occurrence
Programming/erasing
Programming/erasing disabled
enabled FLER = 0
Error protection mode
Program mode
Read disabled
Erase mode
Read enabled
FLER = 1
Figure 20.16 Transitions to Error-Protection State
Software-standby mode
software-standby mode
RES = 0 or STBY = 0
Cancel
programming/erasing disabled
RES = 0 or
STBY = 0
Error-protection mode
(Software standby)
Program/erase interface
register is in its initial state.
Programming/erasing disabled
Rev. 3.00, 03/04, page 667 of 830
Read disabled
(Hardware protection)
FLER = 1
Reset or hardware
Read disabled
FLER = 0
standby
Program/erase interface
register is in its initial state.