mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 1271

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mc9s12xd256

Manufacturer Part Number
mc9s12xd256
Description
Hcs12x Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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And finally the frequency relationship is defined as
With the above values the resistance can be calculated. The example is shown for a loop bandwidth
f
The capacitance C
The capacitance C
A.5.3.2
The basic functionality of the PLL is shown in
deviation from the reference clock f
accordingly.The adjustment is done continuously with no abrupt changes in the clock output frequency.
Noise, voltage, temperature and other factors cause slight variations in the control loop resulting in a clock
jitter. This jitter affects the real minimum and maximum clock periods as illustrated in
Freescale Semiconductor
C
= 20 kHz:
0
Jitter Information
t
min1
t
nom
s
p
t
max1
can now be calculated as:
should be chosen in the range of:
1
C
s
f
=
C
R
----------------------
<
2
=
------------------------------------------ -
n
MC9S12XDP512 Data Sheet, Rev. 2.17
f
ref
C
2
---------------------------- -
=
C
----- -
20
2
2
Figure A-4. Jitter Definitions
is measured and input voltage to the VCO is adjusted
s
R
f
-------------- -
+
VCO
K
2
f
ref
=
n f
C
1
f
p
ref
0.516
-------------- -
f
C
+
C
=
Figure
C
----- -
=
10
2
R
2
s
2
----------------------------------------- -
;
t
minN
t
maxN
---- -
10
539.1Hz
synr
1
=
C
A-3. With each transition of the clock f
0.9
20 20kHz
P
3
= 470pF
f
+
C
1
f
<
C
= 5.5nF = ~ 4.7nF
------------ -
4 10
< 100kHz
f
ref
= 20
=
;
4.7k
=
0.9
Appendix A Electrical Characteristics
N-1
Figure
N
cmp
A-4.
, the
1271

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