mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 788

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mc9s12xd256

Manufacturer Part Number
mc9s12xd256
Description
Hcs12x Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 21 External Bus Interface (S12XEBIV2)
21.1.3
Figure 21-1
21.2
The user is advised to refer to the SoC section for port configuration and location of external bus signals.
Table 21-1
and PIM section for reset states of these pins and associated pull-ups or pull-downs.
788
External Signal Description
outlines the pin names and gives a brief description of their function. Refer to the SoC section
Block Diagram
is a block diagram of the XEBI with all related I/O signals.
The following external bus related signals are described in other sections:
CS2, CS1, CS0 (chip selects) — S12X_MMC section
ECLK, ECLKX2 (free-running clocks) — PIM section
TAGHI, TAGLO (tag inputs) — PIM section, S12X_DBG section
EWAIT
MC9S12XDP512 Data Sheet, Rev. 2.17
Figure 21-1. XEBI Block Diagram
XEBI
NOTE
ADDR[22:0]
DATA[15:0]
IVD[15:0]
LSTRB
R/W
UDS
LDS
RE
WE
ACC[2:0]
IQSTAT[3:0]
Freescale Semiconductor

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