mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 453

• Manufacturer Part Number: mc9s12xd256
• Description: Hcs12x Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

10.3.3.2
The eight data segment registers, each with bits DB[7:0], contain the data to be transmitted or received.
The number of bytes to be transmitted or received is determined by the data length code in the
corresponding DLR register.
Freescale Semiconductor
ID[2:0]
Field
RTR
IDE
7:5
4
3
Reset:
Reset:
W
W
R
R
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
Remote Transmission Request — This flag reflects the status of the Remote Transmission Request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
Data Segment Registers (DSR0-7)
x
x
7
7
Figure 10-32. Identifier Register 2 — Standard Mapping
Figure 10-33. Identifier Register 3 — Standard Mapping
= Unused; always read ‘x’
= Unused; always read ‘x’
6
x
6
x
Table 10-30. IDR1 Register Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.17
5
x
5
x
Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV3)
4
x
4
x
Description
3
x
3
x
x
x
2
2
Table
10-29.
x
x
1
1
x
x
0
0
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