mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 924

• Manufacturer Part Number: mc9s12xd256
• Description: Hcs12x Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 23 DQ256 Port Integration Module (S12XDQ256PIMV2)
23.0.5.8
Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other
modes the data are read from this register.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
23.0.5.9
Read: Anytime. In emulation modes, read operations will return the data from the external bus, in all other
modes the data source is depending on the data direction value.
Write: Anytime. In emulation modes, write operations will also be directed to the external bus.
924
DDRD[7:0]
Reset
Reset
Func.
Field
1. These registers are reset to zero. Two bus clock cycles after reset release the register values are updated with the
7–0
Alt.
W
W
associated pin values.
R
R
ECLKX2
DDRD7
XCLKS
Data Direction Port D — This register controls the data direction for port D. DDRD determines whether each pin
is an input or output. A logic level “1” causes the associated port pin to be an output and a logic level “0” causes
the associated pin to be a high-impedance input.
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Note: Due to internal synchronization circuits, it can take up to 2 bus clock cycles until the correct value is read
PE7
Port D Data Direction Register (DDRD)
Port E Data Register (PORTE)
or
0
0
7
7
on PORTD after changing the DDRD register.
= Unimplemented or Reserved
DDRD6
MODB
TAGHI
PE6
or
0
0
6
6
Figure 23-10. Port D Data Direction Register (DDRD)
Figure 23-11. Port E Data Register (PORTE)
Table 23-11. DDRD Field Descriptions
DDRD5
TAGLO
MC9S12XDP512 Data Sheet, Rev. 2.17
MODA
PE5
RE
or
or
0
0
5
5
DDRD4
ECLK
PE4
0
0
4
4
Description
EROMCTL
DDRD3
LSTRB
PE3
LDS
or
or
0
0
3
3
DDRD2
PE2
R/W
WE
or
0
0
2
2
DDRD1
Freescale Semiconductor
PE1
IRQ
—
0
1
1
1
DDRD0
XIRQ
PE0
—
0
0
0
1