mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 53

• Manufacturer Part Number: mc9s12xd256
• Description: Hcs12x Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
Function 1
PK[5:4]
PK[6:4]
Name
PH7
PH6
PH5
PH4
PH3
PH2
PH1
PH0
PE0
PK7
PK7
PK3
PJ7
PJ6
PJ5
PJ4
PJ2
PJ1
PJ0
Pin
Function 2
ADDR19
EWAIT
[22:20]
KWH7
KWH6
KWH5
KWH4
KWH3
KWH2
KWH1
KWH0
ADDR
Name
KWJ7
KWJ6
KWJ5
KWJ4
KWJ2
KWJ1
KWJ0
XIRQ
Pin
—
—
Function 3
ROMCTL
RXCAN4
ACC[2:0]
TXCAN4
IQSTAT3
MOSI2
MISO2
MOSI1
MISO1
Name
SCK2
SCK1
SDA1
RXD2
SCL1
TXD2
CS1
SS2
SS1
Pin
—
—
—
Table 1-7. Signal Properties Summary (Sheet 2 of 4)
Function 4
Name
RXD5
RXD4
TXD5
TXD4
SDA0
SCL0
CS2
CS0
CS3
MC9S12XDP512 Data Sheet, Rev. 2.17
Pin
—
—
—
—
—
—
—
—
—
—
—
—
Function 5
RXCAN0
TXCAN0
Name
Pin
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Supply
Power
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDR
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
DDX
PERH/PPSH Disabled Port H I/O, interrupt, SS of
PERH/PPSH Disabled Port H I/O, interrupt, MISO
PERH/PPSH Disabled Port H I/O, interrupt, SS of
PERH/PPSH Disabled Port H I/O, interrupt, SCK of
PERH/PPSH Disabled Port H I/O, interrupt, MOSI
PERH/PPSH Disabled Port H I/O, interrupt, MISO
PERH/
PERH/
PUCR
PERJ/
PERJ/
PERJ/
PERJ/
PERJ/
PERJ/
PERJ/
PUCR
PUCR
PUCR
PUCR
PUCR
PPSH
PPSH
CTRL
PPSJ
PPSJ
PPSJ
PPSJ
PPSJ
PPSJ
PPSJ
Internal Pull
Resistor
Chapter 1 Device Overview MC9S12XD-Family
Disabled Port H I/O, interrupt, SCK of
Disabled Port H I/O, interrupt, MOSI
Reset
State
Up
Up
Up
Up
Up
Up
Up
Up
Up
Up
Up
Up
Up
Port E input, non-maskable
interrupt
SPI2, TXD of SCI5
SPI2, RXD of SCI5
of SPI2, TXD of SCI4
of SPI2, RXD of SCI4
SPI1
SPI1
of SPI1
of SPI1
Port J I/O, interrupt, TX of
CAN4, SCL of IIC0, TX of
CAN0
Port J I/O, interrupt, RX of
CAN4, SDA of IIC0, RX of
CAN0
Port J I/O, interrupt, SCL of
IIC1, chip select 2
Port J I/O, interrupt, SDA of
IIC1, chip select 0
Port J I/O, interrupt, chip
select 1
Port J I/O, interrupt, TXD of
SCI2
Port J I/O, interrupt, RXD of
SCI2
Port K I/O
Port K I/O
Port K I/O, EWAIT
ROM on control
Port K I/O, extended
addresses, access source
for external access
Extended address, PIPE
status
Description
input,
53