mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 678

• Manufacturer Part Number: mc9s12xd256
• Description: Hcs12x Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 18 Memory Mapping Control (S12XMMCV3)
Table 18-21
resources (internal) parameters.
18.4.2.4
18.4.2.4.1
The XGATE 64 Kbyte memory space allows access to internal resources only (Registers, RAM, and
FLASH). The 2 Kilobyte register address range is the same register address range as for the CPU and the
BDM module (see
XGATE can access the FLASH in single chip modes, even when the MCU is secured. In expanded modes,
XGATE can not access the FLASH when MCU is secured.
The local address of the XGATE RAM access is translated to the global RAM address range. The XGATE
shares the RAM resource with the CPU and the BDM module (see
XGATE RAM size (XGRAMSIZE) may be lower or equal to the MCU RAM size (RAMSIZE).
The local address of the XGATE FLASH access is translated to the global address as defined by
Table
Example 18-3.
678
18-22.
1
2
3
4
5
External RPAGE accesses in (NX, EX and ST)
External EPAGE accesses in (NX, EX and ST)
When ROMHM is set (see ROMHM in
on-chip memory block.
When the internal NVM is enabled (see ROMON in
the CS0 is not asserted in the space occupied by this on-chip memory block.
External PPAGE accesses in (NX, EX and ST)
1
shows the address boundaries of each chip select and the relationship with the implemented
Internal Resource
XGRAMSIZE is the hexadecimal value of XGATE RAM SIZE in bytes.
XGATE Memory Map Scheme
Figure 18-23. Local to Implemented Global Address Mapping (Without GPAGE)
XGATE FLASH
Chip Selects
Expansion of the XGATE Local Address Map
XGATE RAM
is a general example of the XGATE memory map implementation.
CS2
CS0
CS3
CS2
CS1
Table
3
4
18-22).
Table 18-22. XGATE Implemented Memory Space
Table 18-21. Global Chip Selects Memory Space
XGRAM_LOW = 0x0F_0000 plus (0x1_0000 minus XGRAMSIZE)
XGFLASH_HIGH = 0x78_0000 plus (0xFFFF minus XGRAMSIZE)
MC9S12XDP512 Data Sheet, Rev. 2.17
Bottom Address
0x00_0800
0x10_0000
0x14_0000
0x20_0000
0x40_0000
Table
18-19) the CS2 is asserted in the space occupied by this
Section 18.3.2.5, “MMC Control Register
$Address
0x13_FFFF minus EEPROMSIZE
0x7F_FFFF minus FLASHSIZE
0x0F_FFFF minus RAMSIZE
Table
Top Address
0x1F_FFFF
0x3F_FFFF
18-22).
Freescale Semiconductor
(MMCCTL1))
1
1
5
2