mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 786

• Manufacturer Part Number: mc9s12xd256
• Description: Hcs12x Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 20 S12X Debug (S12XDBGV3) Module
BDM cannot be entered from a breakpoint unless the ENABLE bit is set in the BDM. If entry to BDM via
a BGND instruction is attempted and the ENABLE bit in the BDM is cleared, the S12XCPU actually
executes the BDM firmware code. It checks the ENABLE and returns if ENABLE is not set. If not serviced
by the monitor then the breakpoint is re-asserted when the BDM returns to normal S12XCPU flow.
If the comparator register contents coincide with the SWI/BDM vector address then an SWI in user code
and DBG breakpoint could occur simultaneously. The S12XCPU ensures that BDM requests have a higher
priority than SWI requests. Returning from the BDM/SWI service routine care must be taken to avoid re
triggering a breakpoint.
786
DBGBRK[1]
(DBGC1[3])
When program control returns from a tagged breakpoint using an RTI or
BDM GO command without program counter modification it will return to
the instruction whose tag generated the breakpoint. To avoid re triggering a
breakpoint at the same location reconfigure the S12XDBG module in the
SWI routine, if configured for an SWI breakpoint, or over the BDM
interface by executing a TRACE command before the GO to increment the
program flow past the tagged instruction.
An XGATE software breakpoint is forced immediately, the tracing session
terminated and the XGATE module execution stops. The user can thus
determine if an XGATE breakpoint has occurred by reading out the XGATE
program counter over the BDM interface.
0
1
1
1
1
1
(DBGC1[4])
Table 20-45. Breakpoint Mapping Summary
BDM Bit
X
0
0
1
1
1
MC9S12XDP512 Data Sheet, Rev. 2.17
Enabled
NOTE
BDM
X
X
X
0
1
1
Active
BDM
X
X
0
1
0
1
Breakpoint to BDM
Breakpoint to SWI
Breakpoint to SWI
S12X Breakpoint
No Breakpoint
No Breakpoint
No Breakpoint
Mapping
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