mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 855

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mc9s12xd256

Manufacturer Part Number
mc9s12xd256
Description
Hcs12x Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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22.3.2.38 Port P Data Register (PTP)
Read: Anytime.
Write: Anytime.
Port P pins 7, and 5–0 are associated with the PWM as well as the SPI1 and SPI2 modules. These pins can
be used as general purpose I/O when not used with any of the peripherals.
If the data direction bits of the associated I/O pins are set to logic level “1”, a read returns the value of the
port register, otherwise the buffered pin input state is read.
The PWM function takes precedence over the general purpose I/O and the SPI2 or SPI1 function if the
associated PWM channel is enabled. While channels 6 and 5-0 are output only if the respective channel is
enabled, channel 7 can be PWM output or input if the shutdown feature is enabled. Refer to PWM section
for details.
The SPI2 function takes precedence over the general purpose I/O function if enabled. Refer to SPI section
for details.
The SPI1 function takes precedence over the general purpose I/O function if enabled. Refer to SPI section
for details.
Freescale Semiconductor
Reset
PWM
SPI
W
R
PWM7
SCK2
PTP7
0
7
PWM6
PTP6
SS2
0
6
Figure 22-40. Port P Data Register (PTP)
MOSI2
MC9S12XDP512 Data Sheet, Rev. 2.17
PWM5
PTP5
0
5
MISO2
PWM4
PTP4
0
4
Chapter 22 DP512 Port Integration Module (S12XDP512PIMV2)
PWM3
PTP3
SS1
0
3
PWM2
SCK1
PTP2
0
2
MOSI1
PWM1
PTP1
0
1
MISO1
PWM0
PTP0
0
0
855

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