mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 285

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mc9s12xd256

Manufacturer Part Number
mc9s12xd256
Description
Hcs12x Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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XNOR
Operation
~(RS1 ^ RS2)
~(RD ^ IMM16)
(translates to XNOR RD, #IMM16{15:8]; XNOR RD, #IMM16[7:0])
Performs a bit wise logical exclusive NOR between two 16 bit values and stores the result in the destination
register RD.
Remark: Using R0 as a source registers will calculate the one’s complement of the other source register.
Using R0 as both source operands will fill RD with $FFFF.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
XNOR RD, RS1, RS2
XNOR RD, #IMM16
N
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Refer to XNORH instruction for #IMM16 operations.
0; cleared.
Not affected.
Z
V
0
Source Form
C
RD
RD
Address
MC9S12XDP512 Data Sheet, Rev. 2.17
Mode
IMM8
IMM8
TRI
Logical Exclusive NOR
0
1
1
0
0
0
0
1
1
1
1
1
0
0
1
Machine Code
RD
RD
RD
RS1
IMM16[15:8]
IMM16[7:0]
Chapter 6 XGATE (S12XGATEV2)
RS2
XNOR
1
1
Cycles
P
P
P
285

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