mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 214

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mc9s12xd256

Manufacturer Part Number
mc9s12xd256
Description
Hcs12x Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 6 XGATE (S12XGATEV2)
6.8.2.5
This addressing mode is used to identify the position and size of a bit field for insertion or extraction. The
width and offset are coded in the lower byte of the source register 2, RS2. The content of the upper byte is
ignored. An offset of 0 denotes the right most position and a width of 0 denotes 1 bit. These instructions
are very useful to extract, insert, clear, set or toggle portions of a 16 bit word.
6.8.2.6
The XGATE offers a number of additional instructions for flag manipulation, program flow control and
debugging:
214
1. SIF: Set a channel interrupt flag
2. SSEM: Test and set a hardware semaphore
3. CSEM: Clear a hardware semaphore
4. BRK: Software breakpoint
5. NOP: No Operation
6. RTS: Terminate the current thread
BFEXT
Bit Field Operations
Special Instructions for DMA Usage
15
15
R3,R4,R5 ; R5: W4 bits offset O4, will be extracted from R4 into R3
MC9S12XDP512 Data Sheet, Rev. 2.17
Figure 6-23. Bit Field Addressing
Bit Field Insert
W4
W4=3, O4=2
5
3
2
O4
Bit Field Extract
0
0
RS2
RS1
RD
Freescale Semiconductor

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