mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 204

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mc9s12xd256

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mc9s12xd256
Description
Hcs12x Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 6 XGATE (S12XGATEV2)
6.4.4
The XGATE module offers a set of eight hardware semaphores. These semaphores provide a mechanism
to protect system resources that are shared between two concurrent threads of program execution; one
thread running on the S12X_CPU and one running on the XGATE RISC core.
Each semaphore can only be in one of the three states: “Unlocked”, “Locked by S12X_CPU”, and “Locked
by XGATE”. The S12X_CPU can check and change a semaphore’s state through the XGATE semaphore
register (XGSEM, see
this through its SSEM and CSEM instructions.
Figure 6-21
204
Semaphores
illustrates the valid state transitions.
Section 6.3.1.6, “XGATE Semaphore Register
LOCKED BY
%1
SSEM Instruction
CSEM Instruction
S12X_CPU
XGSEM
Figure 6-21. Semaphore State Transitions
MC9S12XDP512 Data Sheet, Rev. 2.17
UNLOCKED
%0
CSEM Instruction
XGSEM
%1
%0
SSEM Instruction
LOCKED BY
(XGSEM)”). The RISC core does
XGATE
XGSEM
XGSEM
Freescale Semiconductor

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