mc9s12xd256 Freescale Semiconductor, Inc, mc9s12xd256 Datasheet - Page 702

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mc9s12xd256

Manufacturer Part Number
mc9s12xd256
Description
Hcs12x Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Chapter 19 Debug (S12XDBGV2)
19.3.1.4
Read: Anytime
Write: Anytime the module is disarmed.
This register configures the comparators for range matching.
702
CDCM[3:2]
ABCM[1:0]
0x0023
Reset
Field
3–2
1–0
W
R
C and D Comparator Match Control — These bits determine the C and D comparator match mapping as
described in
A and B Comparator Match Control — These bits determine the A and B comparator match mapping as
described in
Debug Control Register2 (DBGC2)
0
0
7
TRANGE
TALIGN
Unimplemented or Reserved
11
00
01
10
11
Table
Table
0
0
6
19-14.
19-15.
Table 19-11. TRCMOD Trace Mode Bit Encoding
Table 19-12. TALIGN Trace Alignment Encoding
Figure 19-6. Debug Control Register2 (DBGC2)
TRCMOD
Table 19-10. TRANGE Trace Range Encoding
00
01
10
11
Table 19-13. DBGC2 Field Descriptions
Trace only in range from comparator C to comparator D
MC9S12XDP512 Data Sheet, Rev. 2.17
0
0
5
Trace buffer entries before and after trigger
Trigger at end of stored data
Trigger before storing data
0
0
4
Tracing Source
Description
Description
Reserved
0
3
Description
NORMAL
Reserved
DETAIL
LOOP1
CDCM
0
2
Freescale Semiconductor
0
1
ABCM
0
0

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