HD6432621 Hitachi, HD6432621 Datasheet - Page 119

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

3.2.2
SYSCR is an 8-bit readable/writable register that selects saturating or non-saturating calculation
for the MAC instruction, selects the interrupt control mode and the detected edge for NMI, and
enables or disables on-chip RAM.
SYSCR is initialized to H'01 by a reset and in hardware standby mode. SYSCR is not initialized in
software standby mode.
Bit 7—MAC Saturation (MACS): Selects either saturating or non-saturating calculation for the
MAC instruction.
Bit 7
MACS
0
1
Bit 6—Reserved: This bit is always read as 0 and cannot be modified.
Bits 5 and 4—Interrupt Control Mode 1 and 0 (INTM1, INTM0): These bits select the control
mode of the interrupt controller. For details of the interrupt control modes, see section 5.4.1,
Interrupt Control Modes and Interrupt Operation.
Bit 5
INTM1
0
1
Bit
Initial value
R/W
System Control Register (SYSCR)
Description
Non-saturating calculation for MAC instruction
Saturating calculation for MAC instruction
Bit 4
INTM0
0
1
0
1
:
:
:
MACS
R/W
7
0
Interrupt
Control Mode
0
—
2
—
—
—
6
0
INTM1
R/W
5
0
Description
Control of interrupts by I bit
Setting prohibited
Control of interrupts by I2 to I0 bits and IPR
Setting prohibited
INTM0
R/W
4
0
NMIEG
R/W
3
0
R/W
—
2
0
—
—
1
0
(Initial value)
(Initial value)
RAME
R/W
0
1
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