HD6432621 Hitachi, HD6432621 Datasheet - Page 737

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Bits 2 to 0—System clock select (SCK2 to SCK0): These bits select the bus master clock in
high-speed mode, and medium-speed mode.
Bit 2
SCK2
0
1
21A.2.3 Low-Power Control Register (LPWRCR)
The LPWRCR is an 8-bit read/write register that controls the low power dissipation modes.
The LPWRCR is initialized to H'00 at a reset and when in hardware standby mode. It is not
initialized in software standby mode. The following describes bits 7 to 2. For details of other bits,
see section 20.2.2, Low-Power Control Register (LPWRCR).
Bits 7 to 4—Reserved: Bits DTON, LSON, NESEL, and SUBSTP must always be written with 0
in the H8S/2623 Series, as this version does not support subclock operation.
Bit 3—Oscillation Circuit Feedback Resistance Control Bit (RFCUT): This bit turns the
internal feedback resistance of the main clock oscillation circuit ON/OFF.
Bit 3
RFCUT
0
1
Bit 2—Reserved: Only write 0 to this bit.
Bit
Initial value
R/W
Bit 1
SCK1
0
1
0
1
Description
When the main clock is oscillating, sets the feedback resistance ON. When the main
clock is stopped, sets the feedback resistance OFF.
Sets the feedback resistance OFF.
:
:
:
DTON
Bit 0
SCK0
0
1
0
1
0
1
—
R/W
7
0
LSON
Description
Bus master in high-speed mode
Medium-speed clock is ø/2
Medium-speed clock is ø/4
Medium-speed clock is ø/8
Medium-speed clock is ø/16
Medium-speed clock is ø/32
—
R/W
6
0
NESEL
R/W
5
0
SUBSTP
R/W
4
0
RFCUT
R/W
3
0
R/W
—
2
0
STC1
R/W
1
0
(Initial value)
(Initial value)
STC0
R/W
0
0
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