HD6432621 Hitachi, HD6432621 Datasheet - Page 570

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Bit 3—Reset Status Bit (GSR3): Indicates whether the HCAN module is in the normal operating
state or the reset state. Writes are invalid.
Bit 3: GSR3
0
1
Bit 2—Message Transmission Status Flag (GSR2): Flag that indicates whether the module is
currently in the message transmission period. The “message transmission period” is the period
from the start of message transmission (SOF) until the end of a 3-bit intermission interval after
EOF (End of Frame). Writes are invalid.
Bit 2: GSR2
0
1
Bit 1—Transmit/Receive Warning Flag (GSR1): Flag that indicates an error warning. Writes
are invalid.
Bit 1: GSR1
0
1
Bit 0—Bus Off Flag (GSR0): Flag that indicates the bus off state. Writes are invalid.
Bit 0: GSR0
0
1
526
Description
Normal operating state
[Setting condition]
After an HCAN internal reset
Configuration mode
[Reset condition]
MCR0 reset mode and sleep mode
Description
Message transmission period
[Reset Condition]
Idle period
Description
[Reset condition]
When TEC < 96 and REC < 96 or TEC
When TEC
Description
[Reset condition]
Recovery from bus off state
When TEC
96 or REC
256 (bus off state)
96
256
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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