HD6432621 Hitachi, HD6432621 Datasheet - Page 314

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Port E Data Register (PEDR)
PEDR is an 8-bit readable/writable register that stores output data for the port E pins (PE7 to PE0).
PEDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port E Register (PORTE)
Note: * Determined by state of pins PE7 to PE0.
PORTE is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port E pins (PE7 to PE0) must always be performed on PEDR.
If a port E read is performed while PEDDR bits are set to 1, the PEDR values are read. If a port E
read is performed while PEDDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORTE contents are determined by the pin states, as
PEDDR and PEDR are initialized. PORTE retains its prior state in software standby mode.
270
Bit
Initial value :
R/W
Bit
Initial value :
R/W
:
:
:
:
PE7DR
R/W
PE7
—*
7
0
7
R
PE6DR
R/W
PE6
—*
6
0
6
R
PE5DR
R/W
PE5
—*
5
0
5
R
PE4DR
R/W
PE4
—*
4
0
4
R
PE3DR
R/W
PE3
—*
3
0
3
R
PE2DR
R/W
PE2
—*
2
0
2
R
PE1DR
R/W
PE1
—*
1
0
1
R
PE0DR
R/W
PE0
—*
0
0
0
R

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