HD6432621 Hitachi, HD6432621 Datasheet - Page 458

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
12.4
During interval timer mode operation, an overflow generates an interval timer interrupt (WOVI).
The interval timer interrupt is requested whenever the OVF flag is set to 1 in TCSR. OVF must be
cleared to 0 in the interrupt handling routine.
If an NMI request has been chosen in the watchdog timer mode, an NMI request is generated
when a TCNT overflow occurs.
12.5
12.5.1
If a timer counter clock pulse is generated during the T
takes priority and the timer counter is not incremented. Figure 12-8 shows this operation.
414
Interrupts
Usage Notes
Contention between Timer Counter (TCNT) Write and Increment
ø
Address
Internal write signal
TCNT input clock
TCNT
Figure 12-8 Contention between TCNT Write and Increment
TCNT write cycle
T
1
N
2
T
state of a TCNT write cycle, the write
2
Counter write data
M

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