HD6432621 Hitachi, HD6432621 Datasheet - Page 996

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

SMR0—Serial Mode Register 0
952
Bit
Initial value
Read/Write
Asynchronous mode/synchronous mode select
0 Asynchronous mode
1
Synchronous mode
:
:
:
Note: * When 7-bit data is selected, the MSB (bit 7) of TDR is not transmitted.
Character length
0 8-bit data
1
R/W
7-bit data*
C/A
7
0
Parity enable
Note: * When the PE bit is set to 1, the parity (even or odd) specified by the
0 Parity bit addition and checking disabled
1
CHR
R/W
Parity bit addition and checking enabled *
6
0
O/E bit is added to transmit data before transmission. In reception, the
parity bit is checked for the parity (even or odd) specified by the O/E bit.
R/W
Notes: *1 When even parity is set, parity bit addition is performed
Parity mode
PE
0 Even parity
1
5
0
Odd parity
*2 When odd parity is set, parity bit addition is performed
R/W
in transmission so that the total number of 1 bits in the
transmit character plus the parity bit is even.
In reception, a check is performed to see if the total
number of 1 bits in the receive character plus the parity
bit is even.
in transmission so that the total number of 1 bits in the
transmit character plus the parity bit is odd.
In reception, a check is performed to see if the total
number of 1 bits in the receive character plus the parity
bit is odd.
O/E
4
0
*2
*1
H'FF78
STOP
Stop bit length
R/W
0 1 stop bit
1
3
0
2 stop bits
Multiprocessor mode
0 Multiprocessor function disabled
1
Multiprocessor format selected
R/W
MP
2
0
CKS1
R/W
Clock select
1
0
0
1
0 ø clock
1
0
1
ø/4 clock
ø/16 clock
ø/64 clock
CKS0
R/W
0
0
SCI0