HD6432621 Hitachi, HD6432621 Datasheet - Page 886
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HD6432621
Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
1.HD6432621.pdf
(1069 pages)
- Current page: 886 of 1069
- Download datasheet (5Mb)
MRA—DTC Mode Register A
842
Bit
Initial value
Read/Write
:
:
:
Undefined
SM1
—
7
Source address mode
0 — SAR is fixed
1
Undefined
SM0
0
1
—
6
SAR is incremented after a transfer
(by +1 when Sz = 0; by +2 when Sz = 1)
SAR is decremented after a transfer
(by –1 when Sz = 0; by –2 when Sz = 1)
Undefined
DM1
—
5
Destination address mode
0 — DAR is fixed
1
Undefined
0
1
DM0
—
4
DAR is incremented after a transfer
(by +1 when Sz = 0; by +2 when Sz = 1)
DAR is decremented after a transfer
(by –1 when Sz = 0; by –2 when Sz = 1)
H'EBC0–H'EFBF
Undefined
MD1
—
DTC mode
3
0
1
0 Normal mode
1
0
1
DTC transfer mode select
Undefined
0 Destination side is repeat
1
Repeat mode
Block transfer mode
—
MD0
—
2
area or block area
Source side is repeat
area or block area
DTC data transfer size
0 Byte-size transfer
1
Undefined
Word-size transfer
DTS
—
1
Undefined
Sz
—
0
DTC
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