HD6432621 Hitachi, HD6432621 Datasheet - Page 383

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
Example of PWM Mode Setting Procedure: Figure 10-24 shows an example of the PWM mode
setting procedure.
Examples of PWM Mode Operation: Figure 10-25 shows an example of PWM mode 1
operation.
In this example, TGRA compare match is set as the TCNT clearing source, 0 is set for the TGRA
initial output value and output value, and 1 is set as the TGRB output value.
In this case, the value set in TGRA is used as the period, and the values set in TGRB registers as
the duty.
Select counter clearing source
Select waveform output level
Select counter clock
Set PWM mode
<PWM mode>
PWM mode
Start count
Set TGR
Figure 10-24 Example of PWM Mode Setting Procedure
[1]
[2]
[3]
[4]
[5]
[6]
[1] Select the counter clock with bits TPSC2 to
[2] Use bits CCLR2 to CCLR0 in TCR to select the
[3] Use TIOR to designate the TGR as an output
[4] Set the cycle in the TGR selected in [2], and set
[5] Select the PWM mode with bits MD3 to MD0 in
[6] Set the CST bit in TSTR to 1 to start the count
TPSC0 in TCR. At the same time, select the
input clock edge with bits CKEG1 and CKEG0 in
TCR.
TGR to be used as the TCNT clearing source.
compare register, and select the initial value and
output value.
the duty in the other the TGR.
TMDR.
operation.
339

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