HD6432621 Hitachi, HD6432621 Datasheet - Page 758

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

The TCSR is initialized to H'00 at a reset and when in hardware standby mode. It is not initialized
in software standby mode.
Bit 4—Prescaler select (PSS): This bit selects the clock source input to WDT1 TCNT.
It also controls operation when shifting low power dissipation modes. The operating mode
selected after the SLEEP instruction is executed is determined in combination with other control
bits.
For details, see the description for clock selection in section 12.2.2, Timer Control/Status Register
(TCSR), and this section.
Bit 4
PSS
0
1
Note: * Always set high-speed mode when shifting to watch mode or sub-active mode.
714
Description
TCNT counts the divided clock from the ø -based prescaler (PSM).
When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode or software standby mode.
TCNT counts the divided clock from the øsubclock-based prescaler (PSS).
When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode, watch mode*, or sub-active mode*.
When the SLEEP instruction is executed in sub-active mode*, operation shifts to sub-
sleep mode*, watch mode*, or high-speed mode.
(Initial value)