HD6432621 Hitachi, HD6432621 Datasheet - Page 130

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

4.2
4.2.1
A reset has the highest exception priority.
When the RES pin goes low, all processing halts and the H8S/2626 Series or H8S/2623 Series
enters the reset state. A reset initializes the internal state of the CPU and the registers of on-chip
supporting modules. Immediately after a reset, interrupt control mode 0 is set.
Reset exception handling begins when the RES pin changes from low to high.
The chip can also be reset by overflow of the watchdog timer. For details see section 12,
Watchdog Timer.
4.2.2
The chip enters the reset state when the RES pin goes low.
To ensure that the chip is reset, hold the RES pin low for at least 20 ms at power-up. To reset the
chip during operation, hold the RES pin low for at least 20 states.
When the RES pin goes high after being held low for the necessary time, the chip starts reset
exception handling as follows:
1. The internal state of the CPU and the registers of the on-chip supporting modules are
2. The reset exception handling vector address is read and transferred to the PC, and program
Figures 4-2 and 4-3 show examples of the reset sequence.
86
initialized, the T bit is cleared to 0 in EXR, and the I bit is set to 1 in EXR and CCR.
execution starts from the address indicated by the PC.
Reset
Overview
Reset Sequence