HD6432621 Hitachi, HD6432621 Datasheet - Page 673

• Manufacturer Part Number: HD6432621
• Description: (HD64F262x Series) 16-Bit Microcomputer
• Manufacturer: Hitachi

Bit 3—RAM Select (RAMS): Specifies selection or non-selection of flash memory emulation in
RAM. When RAMS = 1, all flash memory block are program/erase-protected.
Bit 3: RAMS
0
1
Bits 2 to 0—Flash Memory Area Selection: These bits are used together with bit 3 to select the
flash memory area to be overlapped with RAM. (See table 19-5.)
Table 19-5 Flash Memory Area Divisions
Addresses
H'FFD000–H'FFDFFF
H'000000–H'000FFF
H'001000–H'001FFF
H'002000–H'002FFF
H'003000–H'003FFF
H'004000–H'004FFF
H'005000–H'005FFF
H'006000–H'006FFF
H'007000–H'007FFF
19.5.6
FLPWCR enables or disables a transition to the flash memory power-down mode when the LSI
switches to subactive mode.
Note: * An invalid register in the H8S/2623.
Initial value:
Flash Memory Power Control Register (FLPWCR)*
R/W:
Bit:
Description
Emulation not selected
Program/erase-protection of all flash memory blocks is disabled
Emulation selected
Program/erase-protection of all flash memory blocks is enabled
PDWND
R/W
7
0
Block Name
RAM area 4 kbytes
EB0 (4 kbytes)
EB1 (4 kbytes)
EB2 (4 kbytes)
EB3 (4 kbytes)
EB4 (4 kbytes)
EB5 (4 kbytes)
EB6 (4 kbytes)
EB7 (4 kbytes)
—
6
0
R
—
5
0
R
RAMS
0
1
1
1
1
1
1
1
1
—
4
0
R
RAM2
*
0
0
0
0
1
1
1
1
—
3
0
R
RAM1
*
0
0
1
1
0
0
1
1
—
2
0
R
*: Don't care
—
RAM0
*
0
1
0
1
0
1
0
1
1
0
R
(Initial value)
—
0
0
R
629