HD6432621 Hitachi, HD6432621 Datasheet - Page 373

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
10.4.3
In synchronous operation, the values in a number of TCNT counters can be rewritten
simultaneously (synchronous presetting). Also, a number of TCNT counters can be cleared
simultaneously by making the appropriate setting in TCR (synchronous clearing).
Synchronous operation enables TGR to be incremented with respect to a single time base.
Channels 0 to 5 can all be designated for synchronous operation.
Example of Synchronous Operation Setting Procedure: Figure 10-14 shows an example of the
synchronous operation setting procedure.
<Synchronous presetting>
[1]
[2]
[3]
[4]
[5]
Synchronous presetting
Synchronous operation
Set synchronous
Synchronous Operation
Set to 1 the SYNC bits in TSYR corresponding to the channels to be designated for synchronous
operation.
When the TCNT counter of any of the channels designated for synchronous operation is
written to, the same value is simultaneously written to the other TCNT counters.
Use bits CCLR2 to CCLR0 in TCR to specify TCNT clearing by input capture/output compare,
etc.
Use bits CCLR2 to CCLR0 in TCR to designate synchronous clearing for the counter clearing
source.
Set to 1 the CST bits in TSTR for the relevant channels, to start the count operation.
Set TCNT
operation
selection
Figure 10-14 Example of Synchronous Operation Setting Procedure
[1]
[2]
Synchronous clearing
<Counter clearing>
sourcegeneration
clearing source
Select counter
Start count
channel?
Clearing
Yes
No
[3]
[5]
<Synchronous clearing>
Set synchronous
counter clearing
Start count
[4]
[5]
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