HD6432621 Hitachi, HD6432621 Datasheet - Page 128

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HD6432621

Manufacturer Part Number
HD6432621
Description
(HD64F262x Series) 16-Bit Microcomputer
Manufacturer
Hitachi
Datasheet
4.1.2
Exceptions originate from various sources. Trap instructions and interrupts are handled as follows:
1. The program counter (PC), condition code register (CCR), and extended register (EXR) are
2. The interrupt mask bits are updated. The T bit is cleared to 0.
3. A vector address corresponding to the exception source is generated, and program execution
For a reset exception, steps 2 and 3 above are carried out.
4.1.3
The exception sources are classified as shown in figure 4-1. Different vector addresses are
assigned to different exception sources.
Table 4-2 lists the exception sources and their vector addresses.
84
Notes: *1
pushed onto the stack.
starts from that address.
*2
Exception Handling Operation
Exception Vector Table
Exception
sources
Not available in the H8S/2626 Series or H8S/2623 Series.
48 interrupt sources in the H8S/2626 Series.
Reset
Trace
Interrupts
Trap instruction
Figure 4-1 Exception Sources
Reset
Manual reset *
External interrupts: NMI, IRQ5 to IRQ0
Internal interrupts: 47 interrupt sources*
on-chip supporting modules
1
2
in

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